Computer Control Division is primarily involved in development, maintenance and upgradation of Control, Data Acquisition & Diagnostic Systems for Room Temperature Cyclotron (RTC), Superconducting Cyclotron (SCC), Medical Cyclotron, Electron LINAC and various experimental facilities of the centre. The development of control and data acquisition systems for the Magnetic Field Mapping (MFM) of SCC, RTC and upcoming Medical Cyclotron are the other important activities of this division. The division is also engaged in developing State-of-the-art Instruments e.g. vacuum gauge controller, nano-ammeter, RF power meter, alarm annunciator, etc. and various EPICS software tools.

The main activity of the section is the development of Experimental Physics & Industrial Control System (EPICS) based state-of-the-art distributed control system for Room Temperature Cyclotron (RTC) and Superconducting Cyclotron (SCC). This involves development of Supervisory Control System comprising of Operator Interface (OPI) and Input Output Controller (IOC) for the following subsystems of the cyclotrons.

High current power supplies for various magnets
High voltage power supplies
PIG ion source
Beam diagnostic system
Cyclotron control console
vacuum system
LCW system
Cyclotron status monitoring facility
The section is also responsible for day-to-day maintenance and upgradation of control hardware and software  of the above control system. The testing and implementation of latest tools and technologies of EPICS to control system is being done on regular basis. Beside this, the following ARM based EPICS embedded modules are indigenously developed.

Beam Diagnostics Controller,
Vacuum gauge controller,
Alarm Annunciator
Power supply controller
The following EPICS Software Tools have also been developed.

CA Activex components for OPI,
EPICS MySQL Archiver for control system data logging
web based E-Log for operator log
The development of the following electronics/ controller/ position encoder readout electronics, jig movement controller and software for control and data acquisition for MFM system is an important activity of this section. The indigenously developed MFM system for SCC is capable of acquiring 106 field data point in around 180 minutes without human intervention.

The section indigenously develops the following precision instruments as import substitution.

nano ammter
RF power meter
charge integrator
SiPM based phase measurement with latest technology and connectivity
The section is also entrusted with the development of control system for prototype medical cyclotron.

Journal

[1] Anindya Roy, R. B. Bhole, Partha P. Nandy, R. C. Yadav, Sarbajit Pal, and Amitava Roy, "Implementation of EPICS based vacuum control system for Variable Energy Cyclotron Centre, Kolkata", REVIEW OF SCIENTIFIC INSTRUMENTS 86, 033306 (2015)

Seminar/Conferences/Symposia

[1] Anindya Roy, Shantonu Sahoo, Sarbajit Pal, ‘Application of EPICS Control System Studio in VECC’, Proc. of INPAC 2019, Inter-University Accelerator Centre, New Delhi, India,

[2] Shantonu Sahoo, Arihant Jain, Anindya Roy, ‘EPICS based Embedded Control System Architecture for Electron Gun of E-LINAC’, Proc. of INPAC 2019, Inter-University Accelerator Centre, New Delhi, India,

[3] Anindya Roy, Partha Pratim Nandy, R. B. Bhole, Sarbajit Pal, Amitava Roy, ‘Development of EPICS Enabled Alarm Annunciation System’, Proc. InPAC-2018, Raja Ramanna Centre for Advanced Technology, Indore, India.

[4] Niraj Chaddha, R.B.Bhole, J. Pradhan, P. P. Nandy, Sarbajit Pal, ‘Instrumentation for Position Measurement of Magnetic Median Plane of SCC and Error Analysis’, Proc. InPAC-2018, Raja Ramanna Centre for Advanced Technology, Indore, India.

[5] Shantonu Sahoo et. al, "ARM based embedded EPICS controller for beam-diagnostics of cyclotrons at VECC", proc. ICALEPCS-2013, Oct-2013,

[6] Anindya Roy et. Al, "Filed mapping of K=500 superconducting cyclotron magnet for correction of harmonics with trim coils",  Proc. InPAC-2013, pp 752-754.

[7] S. Sahoo, T. Bhattacharjee,S.Pal, “Development and Performance analysis of EPICS Channel Access Server on FPGA based Soft-core Processor”, International Conference on Personal Computers and Particle Accelerators,  PCAPAC’12 , Kolkata, December 4-7 (2012).

[8] N.Chadda, S.Sahoo, R.B.Bhole, S.Pal, “Modular Beam Diagnostics Instrument Design For Cyclotrons”, PCAPAC’12 , Kolkata, December 4-7 (2012).

[9] Anindya Roy, R. B. Bhole, Sarbajit Pal, “Development of EPICS Channel Access Embedded ActiveX Components for GUI Development”, Proc. of International Conference on Personal Computers & Particle Accelerator Control, PCAPAC’12 , p54-56, December 2012

[10] Anindya Roy, R. B. Bhole, Sarbajit Pal, D. Sarkar, VECC, India, “EPICS MySQL Archiver – Integration between EPICS and MySQL”, Proc. of International Conference on Personal Computers & Particle Accelerator Control, PCAPAC’12, p109-111, December 2012

[11] Tanushyam Bhattacharjee, Anindya Roy, Rajendra Balkrishna Bhole, Gaurav Saxena, Kaushik Datta, Tapas Samanta, Sarbajit Pal, Debranjan Sarkar, "Facility Monitoring SystemusingStorage Area Network for VEC and SCC",in the Proceedings of 9th International  Workshop onPersonal Computers and Particle Accelerator Controls (PCaPAC-2012), VECC, Kolkata, December 4-7(2012).

[12] Niraj Chaddha, R. B. Bhole, Sarbajit Pal, ‘Multiple Parameter Control Using Soft-Console’, Proc. of INPAC 2011, Inter-University Accelerator Centre, New Delhi, India, February 2011.

[13] R. B. Bhole, Anindya Roy, Joydeeo Mishra, Sarbajit Pal, ‘Trim Coil Temperature Control System fpr SCC’, roc. of INPAC 2011, Inter-University Accelerator Centre, New Delhi, India, February 2011.

[14] Anindya Roy, R.B. Bhole, J. Akhtar, R.C. Yadav, Sarbajit Pal, D. Sarkar, R.K. Bhandari, ‘Vacuum system of cyclotrons in VECC, Kolkata’, Proc. of XII IEEE International Vacuum Electronics Conference (IVEC-2011), Bangalore, India, February 2011.

[15] Niraj Chaddha, R. B. Bhole, Tanushyam Bhattacharjee, Anindya Roy, Sarbajit Pal, 'Embedded Systems for Diagnostics & Control Used in VEC and SCC', Proc. of SACET-2009, VECC, Kolkata, October 2009.

1. Development & implementation of Front end electronics and readout electronics for a prototype SiPM based Gamma imaging system using FPGA.

2. Implementation of FPGA based multi channel High speed Data acquisition system for nuclear spectroscopy using PCIe connectivity using high speed ADC.

3. Design and implementation of an FPGA based embedded measurement and controller unit for LLRF e-LINAC cavity control.

The Computer Division, under the Computer & Informatics Group, VECC, provides all sort of computational requirements, IT services, Network Connectivity and Data Acquisition support to VECC. Apart from these, it also does Research & in-house Development in the areas related to the activities of three constituent sections, i.e. the High Performance Computing and Information Technology Services (HPC&ITS) Section, the General Computing and Network Infrastructure Services (GC&NIS) Section and the Artificial Intelligence (AI) Section.

The AI section has the following distinct areas of research and development activities

- Software development for Speech to Sign Language conversion and Vice for the deaf and dumb.

- Hardware development for ultralow current/charge measurement with hardware support for sectional requirements.

- Embedded system development for RF ID based systems 

- Research & Development on Swarm Robotics,

Software development for Speech to Sign Language Conversion and Vice Versa
Still there is lacuna in the available tools for the deaf and dumb community to communicate with the general population. An R&D project for development of a light weight interface for conversion of speech to Indian Sign language (and vice-versa) based on HAMNOSYS (Hamburg Notation System) using avatar (synthesized humanoid). The System will act as a bridge between the communication modality of the speech and hearing impaired people and the people from the mainstream of the society. The system consists of two components - a Forward Translation System and a Reverse Translation System.

Forward Translation system provides real-time translation of spoken English words/numbers to its corresponding sign gesture. Reverse Translation System provides real-time recognition of finger spelled gesture articulated by a human user from a given gesture video to the corresponding texts. The proofs of concept for both have been demonstrated.

 

Embedded system development for RFID based system
The AI section are involved in RFID based embedded system development. Various RFID reader/writer modules with enhanced range are already developed for RFID based handheld attendance recording system, RFID based Library book Issue/Return System, RFID based Library Stock verification system etc.

 

Hardware development for Ultra-low Current/Charge measurement
To fulfill the in-house requirement of cyclotron beam current/charge with high precision, the AI section took up development of hardware for ultra-low charge/current measurement since 2015. It has successfully designed and developed three different model of Pico-ampere meters. All these technologies are transferred to the private entrepreneurs for commercial productions. The latest development is the mini-Pico ampere meter- a miniature (5.1x4.1x1cm3) version of the dual channel digital Pico-Ammeter capable of measuring current from 1pA to 20µA which may be monitored on a local LCD or in PC based GUI application software.

 

 

All these technologies are transferred to the private entrepreneurs for commercial productions. Presently, three technologies have been successfully transferred to three different private entrepreneurs from Eastern, Sothern and Western part of India for commercial production. The entrepreneur from Pune has successfully launched the product and their first product has already been sold.

Research & Development in the area of Swarm Robotics:
Individual robot with high capabilities are costly, involve high-end technologies to manufacture them and difficult to deploy them in unknown terrain. Comparatively, cheap and limited capability robots are easier to make and operate. A group of such limited capability robots can be programmed to do with ease the same job that an individual robot can do. Such group of robots are called Swarm-Robot. Research on the maneuvering such swarm of robots involve, dynamic localization, collision avoidance, collision detections both within the group and with outside obstacles, making various formation as required by the deployed by known/unknown terrain and target following etc. Moreover, there are various deployment problems like coverage, mowing etc. similar to individual robots. The activities of R&D on swarm robotics targets towards achieving them using both Arial and Terrestrial Swarm-Robots. These activities are initiated very recently and prototype unmanned aerial vehicle has been developed.

 

The prototype has been developed with the envisaged applications ranging from perimeter surveillance to atmospheric radiation mapping etc.

The weight of the developed prototype is approximately 1kg with a designed TWR (Thrust to Weight Ratio) of 2:1 i.e. it has a payload capacity equal to its own weight.  

                                               
The quad-copter developed by AI section in landed condition at floor level.
In both Manual and Autonomous Modes, the failsafe safety features (e.g. loss of communication with Remote Control, loss of GPS and low battery) are incorporated to manoeuvre the quad-copter to safe landing.

The GC&NIS involves in providing secure network and Internet access to all the campuses of VECC, providing general purpose computing servers for scientific computing and development of data acquisition system for nuclear physics experiments. The section is involved in providing round the clock user support for computing and network related issues, as well as engaged in R&D activities in the field of hardware and software development, network connectivity and cyber security.

It also provides the state of the art hardware and software resources for the nuclear physics experiments. The front end electronics involve in-house hardware development capability along with the procurement of industry standard hardware. Standard hardware i.e., NIM, CAMAC or VME modules/crates are procured while the requirement specific hardware are developed in-house. Presently, Digital Data Acquisition Systems are being developed to replace bulky and costly analog frontend electronics modules with low cost FPGA based digital system with many advanced features. The DAQ software development for collecting, storing and processing of experimental data is also pursued. A new controller software is being developed to control different digital DAQ stations from a single Master controller.

For General purpose computing, a 2TFlops SMP server KANAAD has been commission with 64 cores, 3TB Memory, 15TB disk space and CENTOS 7.2 Linux. The system is extensible being used by Physicists, students and engineers of the center to run their codes. Section is also extending help to all the users in migration, installation or improvement of the user codes.

High Performance Computing & IT Services Section (HPC&ITSS) is primarily involved in the day-to-day operation, maintenance, system administration and user support for high-performance computing and various critical IT services of VECC.

At present a 96-node computing cluster, christened “Himalaya”, with 2304 cores and 92 TFLOPS of computing power (Theoretical Peak Performance) forms the mainstay of the high-performance computing infrastructure of the Centre.

HPC&ITSS is engaged in the development, upgradation, operation and maintenance of various IT services and applications. Critical IT Services like WWW, DNS, E-mail, Proxy, DHCP, End-Point-Security (Antivirus) and Data Backup etc., along with development of various web-based application software, as per the requirements of the Centre.

DAQ Development and ASIC Design Section

Overview:

ASIC Design Section, under the Applied Electronics Division primarily associated with monolithic mixed-signal design, fabrication, testing and deployment of state-of-the-art indigenous electronics circuit and data acquisition system required for the experimental nuclear physics programme of the centre. The upcoming K-500 superconducting cyclotron will be producing accelerated ion beams of intermediate energy (~ 10-80 MeV/A) for conducting nuclear physics experiments. The front-end electronics and DAQ for such experiments requires integration of thousands of granular radiation detectors within a confined space. The fundamental principles of signal processing from those detectors are to embed the front-end signal processing circuits with the detectors inside vacuum chamber to reduce noise and interference for good energy and time resolution required in such experiments. These detector systems also require a data acquisition set-up which is capable of handling high count-rate and capabilities of processing data of high volume. The spin-offs of the developments of the Section are also being utilized in the other areas of requirements.

Research and Development:

The present engagement of the Section consists the development of complete application-specific front-end electronics (ASICs) and DAQ for segmented detector arrays. Two such Charged Particle Detector Array (CPDA) are to be used for intermediate nuclear physics experiments and Granular charged-particle Multiplicity-filter Detector Array (GMDA) for particle tagged gamma spectroscopy. The Section has also successfully designed integrated CMOS chip for the Neutron Flux Monitor (NFM).

The following facilities are also available in the section. (I) Design stations for deep-submicron CMOS technology (II) Chip-on-Board (CoB) bonding (III) Testing stations of fabricated integrated circuits (IV) Clean Room

The present R&D activities are enumerated as follows:

A. Multichannel Low noise, low power high dynamic range Charge Sensitive Preamplifier (CSA) for CPDA

VECC-001, a 16 channel charge sensitive amplifier was successfully designed, fabricated and tested to replace Mesytec MPR-16 CSA module used in CPDA.
	Specifications:    3 Modes of operation: CPDA (∆E and E Si detectors), GMDA (CsI (Tl)        detector)    Variable dynamic range (500 fC, 1200 fC & 4500 fC)    High GBW OTA with variable Phase margin compensation    Low noise ≈ 1400e with 5.5e/pF slope    Linearity < 0.2%    Capable to handle high input capacitance ≈ 350pF    Developed in 180nm CMOS SCL technology

B. Low power variable shaping time preamplifier and shaper for GMDA 

The GMDA-01 (an 8 channel charge preamplifier with complex conjugate fifth order variable peaking time Gaussian shaper) tape-out was submitted to the foundry for fabrication.		Specifications:    Dynamic Range:         3 x 106 electrons    Sensitivity:                  2mv/fC    Noise:                          300 electrons    Peaking Time:             1µs/3µs    Cross-talk:                   <1%    Linearity:                     1%

C. Integrated CMOS discriminator with Pico-second time resolution

The time pick-off discriminator circuit was designed. The conventional discriminator can work with time resolution of hundreds of pico-seconds. However, our design achieved time resolution in the order of tens of pico-seconds with special design techniques.

D. NFM Chip

The ASIC to replace commercial ICs, being used for indigenous development of electronics for Neutron flux monitor, was designed and submitted for fabrication.

E. Design of two phase peak detector for integration with Digital DAQ

Collaboration:

A Joint Collaborative Agreement (JCA) has been signed on October 4, 2018 at VECC between VECC and SCL for “Fabrication & Packaging of ASICs, designed by VECC, using SCL 0.18µm CMOS Technology for in-house Applications at VECC”.

Publications:

Conference:

1. M. K. Jha et al., “Design and characterization of a charge sensitive amplifier in deep-submicron CMOS for nuclear spectroscopy” in the Proceedings of the ninth DAE-VIE symposium on emerging trends in instrumentation and control and computer systems, June, 2016

2. M. K. Jha, et al., “Design of Multichannel Readout ASIC for particle tagged gamma spectroscopy at VECC”, in the Proceedings of DAE-BRNS Symp. on Nucl. Phys 2019.

3. M. K. Jha, et al., “Design of CMOS peak detector for ASIC integrated with independent digital DAQ for nuclear spectroscopy”, in the Proceedings of DAE-BRNS Symp. on Nucl. Phys. 2019.

4. P. Bahre et al., “Design and Characterization of a Monolithic Non-delay Line Constant Fraction Discriminator for in-house Nuclear Physics Experiments with CPDA at VECC”, in the Proceedings of DAE-BRNS Symp. on Nucl. Phys. 2019.

M.Tech. Theses:

1. P. Bahre, “Study, design and characterization of CMOS-based timing circuits for nuclear physics applications”, HBNI, 2018-19

2. M. K. Jha, “Study, design and simulation of CMOS based Amplifiers for Nuclear Spectroscopy”, HBNI, 2014-15.